Contents
- Introduction and Intermediate Representations: Goals and syllabus, course materials and technical terms. Overview of a compiler framework. Intermediate code and basic blocks. Varieties of IRs: IR trees and tree-address instructions. Static single-assignment form.
- Lexical, syntax and semantic analysis: Lexical tokens and regular expressions. Grammar and Finite State Machines. Context-free grammars, predictive and LR parsing. Parse trees. Semantic analysis, symbol tables and type-checking.
- Run-time organization and code generation: Data memory layout and activation records. Stack frames and parameter passing. Algorithms for instruction selection. Register allocation.
- Dataflow analysis and code optimizations: Liveness analysis. Static vs dynamic liveness. Transformation using dataflow analysis. Machine-independent code optimizer. Standard optimizations levels. Loop optimizations and power/energy optimizations.
- LLVM and the nu+ backend: a case study: What is LLVM? LLVM vs GCC. LLVM compilation flow. LLVM IR. The nu+ architecture and toolchain.
- High level synthesis: Reconfigurable hardware as a compilation target. FPGA and VHDL essentials. Traditional logic synthesis tool flow. Hardware synthesis from high-level languages: an overview. Allocation, Binding, Scheduling. Memory optimizations. Interfaces. Examples of real-world environments and tools: Xilinx Vivado HLS.
Lectures
Thursday 15:30-17:30pm in Meeting Room @ DIETI (ed. II, fourth floor, room number 4.19)