Edoardo Fusella is currently a Research Fellow at the Department of Electrical Engineering and Information Technologies of the University of Naples Federico II. He received the BS, MS, and PhD degrees in computer engineering in 2008, 2011, and 2015, respectively, from the University of Naples Federico II, Italy. From October 2008 to April 2009, he has been a visiting student at the ITU, Istanbul Teknik Universitesi (Turkey). From March 2011 to July 2011, he has been a visiting researcher in the Real Time Communication Group at the NEC Laboratories Europe (Germany). Being a member of this research group, he took part in several research projects including COAST, a FP7 project funded by the European Union. From June 2014 to October 2014, he has been a visiting researcher at the Universitat Politècnica de València (Spain).
Dr. Fusella has authored more than 20 peer-reviewed papers published in leading journals and international conferences such as the ACM Transactions on Embedded Computing Systems (TECS), the IEEE Transactions on Very Large Scale Integration Systems (TVLSI), the IEEE Transactions on Parallel and Distributed Systems (TPDS), the IEEE Circuits and Systems Magazine, Integration the VLSI Journal, DATE and FPL conferences, and others. He is also involved in the Technical Program Committee of several IEEE/ACM leading conferences and has served as a reviewer for many journals and international conferences, including IEEE TETC, IEEE TVLSI, ACM TECS, Journal of Parallel and Distributed Computing, Journal of Supercomputing, DATE, etc. He currently serves as Associate Editor for the International Journal of High Performance Systems Architecture and Guest Editor for the ACM Journal of Emerging Technologies in Computing Systems. He is also involved in several research projects related to embedded systems design, reconfigurable computing design techniques and heterogeneous manycore architectures for HPC. One of them is the MANGO project ("MANGO: exploring Manycore Architectures for Next-GeneratiOn HPC systems") funded by the European Union under Horizon 2020, the EU's research and innovation funding scheme.
Dr. Fusella's research interests focus on the domain of highly-parallel and energy-efficient architectures for many-core systems and heterogeneous high performance computing. In particular, he has been investigating on-chip communication and memory architectures, with emphasis on both electronic and optical on-chip networks, ranging from design tools to implementation and physical design. He also works on compiler techniques and programming models for heterogeneous platforms.